OEN=0, OPS=0, CAPTURE_MODE=00
Timer Channel Status and Control Register
OEN | Output Enable 0 (0): The external pin is configured as an input. 1 (1): The OFLAG output signal is driven on the external pin. Other timer groups using this external pin as their input see the driven value. The polarity of the signal is determined by OPS. |
OPS | Output Polarity Select 0 (0): True polarity. 1 (1): Inverted polarity. |
FORCE | Force OFLAG Output |
VAL | Forced OFLAG Value |
EEOF | Enable External OFLAG Force |
MSTR | Master Mode |
CAPTURE_MODE | Input Capture Mode 0 (00): Capture function is disabled 1 (01): Load capture register on rising edge (when IPS=0) or falling edge (when IPS=1) of input 2 (10): Load capture register on falling edge (when IPS=0) or rising edge (when IPS=1) of input 3 (11): Load capture register on both edges of input |
INPUT | External Input Signal |
IPS | Input Polarity Select |
IEFIE | Input Edge Flag Interrupt Enable |
IEF | Input Edge Flag |
TOFIE | Timer Overflow Flag Interrupt Enable |
TOF | Timer Overflow Flag |
TCFIE | Timer Compare Flag Interrupt Enable |
TCF | Timer Compare Flag |